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Chip design for submicron VLSI : CMO...

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Uyemura, John P. (1952-)

Chip design for submicron VLSI : CMOS layout and simulation

紀錄類型:	書目-語言資料,印刷品 : 單行本
副題名:	CMOS layout and simulation
作者:	UyemuraJohn P., 1952-
出版地:	Toronto
出版者:	Thomson/Nelson;
出版年:	c2006
面頁冊數:	xvi, 411 p.ill. : 25 cm. +; 1 CD-ROM (4 3/4 in.)+
標題:	Metal oxide semiconductors, Complementary - Design andconstruction -
標題:	Integrated circuits - Very large scale integration -
ISBN:	053446629X

Chip design for submicron VLSI : CMOS layout and simulation
Uyemura, John P.

Chip design for submicron VLSI = : CMOS layout and simulation / John P. Uyemura ; - Toronto : Thomson/Nelson, c2006. - xvi, 411 p. ; ill. ; 25 cm. +.
Includes bibliographical references and index.
ISBN 053446629X
Metal oxide semiconductors, ComplementaryIntegrated circuits -- Design andconstruction -- Very large scale integration

Chip design for submicron VLSI : CMOS layout and simulation
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